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Faculty details

Prof.Kaushik Mazumdar

Designation: Associate Professor

Department: Electronics Engineering

Email: kaushik[at]iitism[dot]ac[dot]in

Contact Number:

Personal Page: Under Construction

About Me: Dr. Kaushik Mazumdar (Senior Member, IEEE) received the B.Tech., M.Tech., and Ph.D. (Tech.) degrees in Electronics Engineering, specializing in VLSI Design, Analog/Mixed-signal VLSI Circuit Design & Architectures, and Advanced CMOS Devices. He is currently an Associate Professor in the Department of Electronics Engineering at the Indian Institute of Technology (ISM) Dhanbad, India. He joined the institute as an Assistant Professor in 2012. He also serves as the In-Charge of the Research and Development Laboratory of Cyber-Physical Systems and Nano Devices at IIT (ISM) Dhanbad. His research focuses on VLSI Design, Digital IC Design, Embedded Systems, Advanced CMOS Technology, Semiconductor Device Physics, Carrier Transport Phenomena, Heterostructure Devices, Low-Dimensional Electronic Systems, MOSFETs, HEMTs, Wide-Bandgap Semiconductor Devices, and Nanoelectronics. His research has been published extensively in high-impact Q1 and Q2 (SCI) international journals, IEEE Transactions, and leading international conferences, reflecting his commitment to advancing semiconductor and integrated circuit technologies. As Principal Investigator, he has successfully completed several Government of India-funded Research and Development projects. In particular, he has led and completed three major R&D projects funded by the Department of Science and Technology – ANRF, contributing significantly to the development of advanced semiconductor devices and VLSI technologies. His research innovations have also led to the grant of three Utility Patents in the field of VLSI Design, with Prof. Mazumdar as the inventor. In addition, five more patent applications, with Prof. Mazumdar as the inventor, have been published, further demonstrating the translational impact of his research in semiconductor devices and VLSI technologies. In recognition of his outstanding contributions to translational research, he was honored with the prestigious Technology Translation Research Advancement (TETRA–SERB) Award from the Department of Science and Technology – ANRF (erstwhile SERB), Government of India, together with a competitive research grant of ₹30 lakh to pursue advanced research in semiconductor devices and VLSI technology. This was awarded to him as one of the successful Investigator chosen by GoI Expert Committee among 10 best Awardees based upon the accomplishment in Novelty regarding terms of project complexity and deliverables, Tech. translation benefiting the existing needs, Complementarity of industrial partner and their contribution and Suggested success indicators and potential from the eligible applications for the 2022 meritorious award. Dr. Kaushik Mazumdar is committed to mentoring highly motivated researchers, supervising Ph.D. scholars and fostering an environment of innovation, scientific excellence, and interdisciplinary collaboration. His research group provides opportunities to work on state-of-the-art semiconductor devices, VLSI circuits, embedded systems, and next-generation electronic technologies through externally funded research projects, advanced simulation and design tools, and experimental research.

Research Interest: Dr. Kaushik Mazumdar's research is centered on the VLSI Design, Analog and Mixed-signal VLSI Circuit Design & Architectures, design, modeling, simulation, and optimization of advanced semiconductor devices, integrated circuits, and intelligent electronic systems. His work bridges semiconductor device physics, nanoelectronics, VLSI technologies, embedded computing, AI-assisted electronic design to enable next-generation high-performance and energy-efficient electronic systems, and ML integrated Biosensors. His research interests include: Advanced VLSI Design, Microelectronics, and CMOS Technologies Wide-Bandgap Semiconductor Devices (GaN/AlGaN HEMTs), Advanced MOSFETs, HEMTs, and Emerging Nanoelectronic Devices, Electronic Low-Dimensional Systems and Nanoelectronics, TCAD-Based Device Modeling, Process Simulation and Process Optimization, Low-Power and High-Speed Integrated Circuit Design, Semiconductor Device Physics and Compact Modeling, Power Electronics and High-Frequency Devices, Embedded System Design, Advanced Processor Architectures (RISC/CISC), Intelligent Hardware Design, and Hardware–Software Co-Design, AI-Driven Optimization of Electronic Devices, Circuits & Systems, and Mobile edge computing.

Curriculum
Vitae
Publications

Teaching

Prof. Kaushik Mazumdar had started his teaching career as Faculty in the domain of Electronics Engineering, since 17th April, 2008. 

Currecntly he is an Associate Professor, in ECE Dept. of IIT (ISM) Dhanbad.

Teaching experience (ECE) of Courses:-

VLSI Design
Test and Verification of VLSI Circuits
Digital IC design
MOS Device Physics and Modeling
Digital Electronics & Circuit Design
Embedded System Design
Microprocessors and Microcontrollers
Network Theory And Filter Design
Telemetry and Remote Sensing
Cryptography and Network security (CSP) 
Data Based Management
Electronics Engineering
Basics of Electronics Engineering
Digital Electronics (CSE)
Microprocessor and their application (AGP) 
Microprocessor and its Application (PE)

Academics

 

BTech. and MTech. in Electronics Engineering; Ph.D. (Tech.) in Microelectronics & VLSI Design

Position

 

Positions held

Institution

From

(year)

To

(year)

Associate Professor

IIT (ISM) Dhanbad

 2023

Till Date 

Assistant Professor

IIT (ISM) Dhanbad

2012

    2023

Awards and Honors

In recognition of his outstanding contributions to translational research, he was honored with the prestigious Technology Translation Research Advancement (TETRA–SERB) Award from the Department of Science and Technology – ANRF (erstwhile SERB), Government of India, together with a competitive research grant of around ₹30 lakh to pursue advanced research in semiconductor devices and VLSI technology. This was awarded to him as one of the successful Investigator chosen by Govt. of India Expert Committee among 10 best Awardees based upon the accomplishment in Novelty regarding terms of project complexity and deliverables, Tech. translation benefiting the existing needs, Complementarity of industrial partner and their contribution and Suggested success indicators and potential from the eligible applications for the 2022 meritorious award.

Publications

Books Published

Title

Author’s Name

Publisher

Year of Publication

“A Comprehensive Analysis of Quantum Communication Network: State-of-the-Art, Applications and Future Prospects”, From Bits to Qubits: The Quantum Transformation of Computing [Pages 3-30 (Book Chapter)]

S. K. Sahu and K. Mazumdar

Springer Nature

2026

“Synergistic Integration of High Electron Mobility Transistors (HEMT) and Quantum Dots for Spintronics-Based Quantum Computing”, Field-Effect Transistors Technology

From Sustainability to Next-Generation VLSI Design [Pages 297-326 (Book Chapter)]

S. K. Sahu and K. Mazumdar

CRC Press

2025

Cognitive Cardiac Rehabilitation Using IoT and AI Tools [Pages 1-254 (full Edited book)]

P.Bhowmick, S.Das, and K.Mazumdar

IGI Global Scientific Publishing

2023

“The role of AI-ML techniques in cyber security”, Methods,

Implementation, and Application of Cyber Security Intelligence and Analytics [Pages 35-51 (Book Chapter)]

S.Das, A.K.Balmiki, and K.Mazumdar

IGI Global Scientific Publishing

2022

“Internet of Things with Machine Learning-Based Smart

Cardiovascular Disease Classifier for Healthcare in Secure Platform”, Internet of Things and Data Mining for Modern Engineering and Healthcare Applications [Pages 45-63 (Book Chapter)]

S.Das, J.Das, S.Modak, and K.Mazumdar

Taylor & Francis Group

2022

“Comparative Analysis of Current for Specific Scattering in GaN MOSFET”, Lecture Notes in Networks and Systems[Pages 127- 133 (Book Chapter)]

K.Mazumdar, P.Kumar, and A.Ghosal

Springer Nature

2019

List Of Research Publications (only in Peer-reviewed Journals)

Author(s)

Title

Name of Journal

Volume

Page

Year

S.K.Sahu and K.Mazumdar

Key Factors Affecting Dynamic Reliability in GaN HEMTs and How Can They Be Mitigated?

IEEE Transactions on Device and Materials Reliability

(SCIE, Impact Factor: 2.7)

26

388-408

2026

C.Das and K.Mazumdar

HEMT-based wearable biosensors for noninvasive health monitoring and AI-driven diagnostics: A review

IEEE Transactions on NanoBioscience

(SCIE, Q1- JCR 2024, Impact Factor: 4.4)

25

150-159

2026

S. K.Sahu and K.Mazumdar

Investigation of a GaAs/AlGaAs/InGaAs pHEMT with 500 nm Gate Length for 5G RF Front Ends

IETE Journal of Research

(SCIE, Impact Factor: 1.3)

72

995-1005

2026

S.K.Sahu, C.Das and K.Mazumdar

TCAD Simulation Based Comparative DC Analysis of Heterojunction Material Selection for High Electron Mobility Transistor

Macromolecular Symposia Wiley

-

2026

S.K.Sahu and K.Mazumdar

TCAD Analysis of GaAs/AlGaAs Multi-Quantum-Well Laser Diode with Nanoscale Active Regions Using Scalar and Vector Helmholtz Solvers

Macromolecular Symposia Wiley

-

2026

S.K.Sahu and K.Mazumdar

Investigation of Current Collapse and Recovery Phenomena in GaN FET Induced by Intentional Iron Doping and Bulk Traps

Macromolecular Symposia Wiley

-

2026

C.Das and K.Mazumdar

Modeling and Simulation of GaInAsN/GaAs MOS-HEMT for Rapid Detection in Biosensor Applications

Analog Integrated Circuits and Signal Processing

(SCIE, Impact Factor: 1.4)

126

1-8

2026

S.K.Sahu and K.Mazumdar

DC Characterization of Next-Generation Vertical AlGaN/GaN HEMTs having CAVET and Superjunction Architectures for High-Performance Electronics

Journal of Electronic Materials

(SCIE, Impact Factor: 2.8)

54

10343–10352

2025

S.K.Sahu, K.Mazumdar and S.Kumar

A Systematic Analysis on the Applications of AlGaN/GaN HEMT for High-Performance Sensing

IEEE Sensors Reviews

2

479- 497

2025

S.K.Sahu, K.Mazumdar, Kitmo, Y.B.Jember and S.Das

Design and investigation of InGaAs/InP/InAlAs MOSFET with optimized switching efficiency

IEEE Access

(Q2, SCIE Impact Factor 3.9)

12

70045-70052

2024

S.Chakraborty and K.Mazumdar

Sustainable task offloading decision using genetic algorithm in sensor mobile edge computing

Journal of King Saud University – Computer and Information Sciences

(Q1, SCI Impact Factor 5.2)

34

1552-1568

2022

S.Chakraborty, K.Mazumdar, D.De, and S.Kumar

RMS: A Delay Sensitive Road Monitoring System using Edge Intelligence

IEEE Sensors Journal

(Q2, SCI Impact Factor 4.3)

23

2643-2650

2022

S.Chakraborty, K.Mazumdar, and D.De

CBLM: Cluster-Based Location Management for 5G Small Cell Network Under Stochastic Environment

Journal of Circuits, Systems and Computers

(Q4, SCI Impact Factor 1.5)

30

2150174

2021

K.Mazumdar, S.Kala, and A.Ghosal

Nanocrack Formation Due to Inverse Piezoelectric Effect in AlGaN/GaN HEMT

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

125

120-124

2019

K.Mazumdar, R.Shankar, and A.Ghosal

Design and investigation of InAlN/Al14N15N superlattice MOSFET

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

109

54-57

2017

K.Mazumdar, R.Shankar, and A.Ghosal

Analytical innovation of static characteristics for novel AlGaN/Ga14N15N superlattice MOSFET

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

120

824-827

2018

K.Mazumdar, R.K.Ranjan, R.Shankar, B.Priyadarshini, and A.Ghosal

Modern comparative approach for carrier transport in InAlN/AlN superlattice device with characteristics and modelling using nitride (14N,15N) isotopes

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

103

190-194

2017

K.Mazumdar, R.K.Ranjan, R.Shankar, A.Sharan, B.Priyadarshini, M.Kundu, and A.Ghosal

Analysis of electron transport in AlGaN/GaN superlattice HEMTs for isotopes 14N and 15N

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

100

983-987

2016

K.Mazumdar, G.K.Pathak, and A.Ghosal

Drain current versus drain voltage characteristics for an analytical Al0.25Ga0.75N/GaN superlattice MOSFET

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

97

448-451

2016

K.Mazumdar, V.P.Singh, A.Sharan, and A.Ghosal

Study of the carrier transport in presence of backscattering in InAs nanowire based MOSFET after GaN

Superlattices and Microstructures

(Q2, SCI Impact Factor 3.1)

88

110-115

2015

K.Mazumdar, A.Jha, R.Begum and A.Ghosal

Mobility of 1-D GaAs Quantum Wire Limited by Polar Optic Phonon Scattering

International Journal of Innovative Research in Science, Engineering and Technology

3

1-4

2014

K.Mazumdar, S.Hussain, V.P. Singh and A.Ghosal

Tunneling Effect in Double Barrier Nitride (AlGaN/GaN) Heterostructures at Very Low Temperature

Science International

27

1017-1019

2015

Papers in conference abstract volumes / presented

 

S. K. Sahu and K. Mazumdar, “Design and Analysis of Vertical Cavity Surface Emitting Laser (VCSEL) for High-Power and Thermally Stable Operation”, Proceedings of IEEE 13th International Conference on Intelligent Embedded, MicroElectronics, Communication and Optical Networks (IEMECON), Year 2025, Pages 1-5.

C.Das, K.Mazumdar and K.A.Shah, “Modeling and Characterization of Al0.8ln0.15Ga0.05N/GaN HEMTs With Enhanced 2DEG Density for High-Power Applications”, Proceedings of 8th International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech), Year 2025, Pages 1-5.

C.Das and K.Mazumdar, “Impact of Cap Layer Engineering on the DC and RF Performance of N-Polar AlGaN/GaN HEMTs”, Proceedings of 6th International Conference on 2025 Devices for Integrated Circuit, DevIC 2025, Year 2025, Pages 439-442.

K.Mazumdar, K.A.Shah, and A.Ghosal, “Low Power CMOS Comparator with low offset voltage and good resolution for 10-bit SAR ADC”, Proceedings of 2022 IEEE International Conference of Electron

     Devices Society Kolkata Chapter, EDKCON 2022, Year 2022, Pages 57-62.

K.Mazumdar and V.K.Patel, “Modelling and simulation of GaAs nanowire transistors”, Proceedings of 4th International Conference on 2021 Devices for Integrated Circuit, DevIC 2021, Year 2021, Pages 190-192.

K.Mazumdar and A.Ghorai, “Power optimized 10 Bit ADC IP design in transistor level”, Proceedings of 4th International Conference on 2021 Devices for Integrated Circuit, DevIC 2021, Year 2021, Pages 180-184.

B.Kumari, K.Mazumdar, and A.Ghosal, “Comparative Investigation of DSG-MOSFET and Some analysis on its Performance”, Proceedings of 3rd International Conference on 2019 Devices for Integrated

     Circuit, DevIC 2019, Year 2019, Pages 128-130.

K.Mazumdar, S.Kumar, and A.Ghosal, “Advanced pioneer approach to various properties and significant parameters in special semiconductor arrangement”, Proceedings of 2nd International Conference on 2017 Devices for Integrated Circuit, DevIC 2017, Year 2017, Pages 410-413.

K.Mazumdar, G.K.Pathak, A.Sharan, and A.Ghosal, “Mobility and power dissipation due to total phonon scatterings compared with ballistic transport in AlGaN/GaN superlattice” 2015 6th International

    Conference on Computers and Devices for Communication (CODEC), Department of Radio Physics and   Electronics, University of Calcutta, Year 2015, Pages 1-3.

K.Mazumdar, V.P.Singh and A.Ghosal, “Analysis of various electron scattering mechanisms in quantum wells of AlGaN/GaN superlattice heterostructures”, 1st International Conference on Scattering and Diffraction Techniques for Material Characterization, Dept. of Physics, NIT Rourkela, December 13-15, 2013.

Patents

Patent Title

Name of Applicant(s)

Patent No.

Award Date

Agency/Country

Status

Design And Investigation Of In0.52Al0.48As/In0.53Ga0.47As MOSFET With Optimized Switching Efficiency

Sole Inventor: Kaushik Mazumdar

538728

Granted on 20/05/2024

The Patent Office, Government Of India, Country- India

 Granted

In0.22Al0.2Ga0.58As/In0.63Ga0.37 As metal –oxide –semiconductor high -electron -mobility transistor (HEMT) with TiO2 passivation for RF application

Inventor: Kaushik Mazumdar,  Chumki Das

576965

Granted on

31/12/2025

The Patent Office, Government Of India, Country- India

Granted

N -Polar AlGaN/GaN High Electron Mobility Transistor (HEMT) using AlN Cap Layers and HfO2 Dielectrics with enhanced DC and RF performance

Inventor: Kaushik Mazumdar, Chumki Das

587604

Granted on

24/04/2026

The Patent Office, Government Of India, Country- India

Granted

SYSTEM AND METHOD FOR PRIVACY-PRESERVING OBJECT DETECTION USING FEDERATED YOLOV8 IN CONNECTED AND AUTONOMOUS VEHICLES

Inventor: Kaushik Mazumdar, Subindu Saha and Swastik Kumar Sahu

202531105457

2025

The Patent Office, Government Of India, Country- India

Filed, Published,

FER ISSUED:  10/12/2025

A Multi -Layer Quantum Chip Packaging Process Integrating Meta - Material Shielding, Cryogenic Enclosure, And Superconducting Interconnects

Inventor: Kaushik Mazumdar, Swastik Kumar Sahu

202531025042

2025

The Patent Office, Government Of India, Country- India

Filed on 20.03.2025

A heterojunction bipolar transistor (HBT) based on AlGaAsP/GaAsP for high frequency applications

Inventor: Kaushik Mazumdar, Swastik Kumar Sahu and Sarita Gupta

202531068584

2025

The Patent Office, Government Of India, Country- India

Filed,

REPLY TO FER DATE:

14/05/2026

A machine learning based system and method for early fire detection and extinguishing in coal mines.

Inventor: Kaushik Mazumdar and Swastik Kumar Sahu

202631031832

2026

The Patent Office, Government Of India, Country- India

Filed, Published, FER ISSUED:  20/04/2026

Development of an Optimized Autoencoder System and Method for Detecting Faults of Drilling Machines in Underground Coal Mines and Bauxite Mines

Inventor: Kaushik Mazumdar, Bandita Sarkar and Biswaranjan Das

202631026571

2026

The Patent Office, Government Of India, Country- India

Filed, Published, FER ISSUED:  12/05/2026

Projects & Activities

Sponsored Research Projects (External Funded)

Externally funded RESEARCH & DEVELOPMENT Sanctions

   1. Completed DST, GOVT. OF INDIA funded Research & Development Project of budget amount Rs 34,99,679 as PI on title: Design and efficient implementation of low cost and power proficient model of Cyber Security System physical Layer Circuit through accomplished powerful algorithm by advanced innovative electronic active devices. Here the proposal also include security scheme for cloud system. Project start date: 08-01-2019 and end date: 07-05-2022.

   2. Completed DST, GOVT. OF INDIA funded Research & Development Project of budget amount Rs 23,76,000 as PI on title: Design and development of  innovative MOSFET and some investigations on its novel properties for industrial deployment. Here a proposal for design of quality MOSFET and its applications was made. Project start date: 27-03-2018 and end date: 26-03-2021.

  3. Completed TEQIP funded Research & Development Project of budget amount Rs 2,00,000 as PI on title: Design of circuitry for obtaining significant characteristics using GaN and GaAs based high electron mobility transistors (HEMT) and MOSFET. Project start date: 21-01-2017 and end date: 20-07-2017.

   4. Completed DST, GOVT. OF INDIA funded Research & Development Project of budget amount Rs 30,10,000 as PI on title: Design and investigation of high performance In0.52Al0.48As/In0.53Ga0.47As MOSFET with optimized switching efficiency (sanctioned in 2022) funded by SERB DST.

Membership of Scientific Societies

IEEE senior member,

IETE Life member.

Guidance

SUPERVISION______________________________________________

1. Supervised 19 MTech. Thesis and many numbers of BTech. Students in IIT(ISM) Dhanbad.

2. Already Supervised PhD scholar as Sole Guide and also currently Supervising 12 allotted PhD scholars in ECE dept., IIT(ISM) Dhanbad.

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