Teaching
1. Basics of Electronics Engineering
2. Analog Integrated Circuits
3. Microprocessor and Microcontroller
4. Digital Electronics
5. Current Mode Analog Circuit
6. CAD for VLSI
Designation: Associate Professor
Department: Electronics Engineering
Email: rajeev[at]iitism[dot]ac[dot]in
Contact Number: 9471191517
Office Number: +91-326-223-5658
Personal Page: Under Construction
About Me: Dr. Rajeev Kumar Ranjan is an Associate Professor in the Department of Electronics Engineering at the Indian Institute of Technology (ISM), Dhanbad, where he also obtained his Ph.D. He began his professional career as a Project Scientist at CSIR–CEERI, Pilani (2004–2005), followed by his role as an Assistant Professor at SLIET, Punjab (2007–2010). He has been serving at IIT (ISM) Dhanbad since 2010, contributing extensively to teaching, research, and VLSI system development. Dr. Ranjan has authored over 60 peer-reviewed publications in reputed international journals including IEEE Transactions on Circuits and Systems, IEEE Transactions on Nanotechnology, and IEEE Transactions on VLSI Systems. His research primarily focuses on analog and mixed-signal VLSI design, memristive and emerging devices, in-memory and neuromorphic computing architectures, crossbar-based computing systems, and CMOS digital design across advanced technology nodes. He has led and contributed to several research projects supported by the Ministry of Electronics and Information Technology (MeitY) and other national funding agencies, with emphasis on indigenous semiconductor and intelligent hardware development. He has been recognized in the Stanford University Top 2% Scientists List (2023) and received the prestigious Shastri Institutional Collaborative Research Grant (SICRG) in 2020. Dr. Ranjan actively contributes to the research community as an Associate Editor of the Journal of Circuits, Systems and Computers and Editorial Manager of AEÜ – International Journal of Electronics and Communications, and regularly reviews for leading IEEE and Elsevier journals in VLSI and circuit design. His integrated circuit APEEC1, a low-power analog memristor emulator, received national recognition at Semicon India 2025, highlighting contributions toward India’s semiconductor and VLSI ecosystem. He has also taught a wide range of undergraduate and postgraduate courses in VLSI design, analog circuits, digital systems, and semiconductor devices, mentoring numerous students in cutting-edge IC design and hardware research.
Research Interest: His research interests center on VLSI and integrated circuit design, with emphasis on analog and mixed-signal VLSI architectures, low-power CMOS circuit techniques, and advanced digital IC design in deep-submicron technologies. His work integrates neuromorphic and in-memory computing architectures within conventional VLSI frameworks, including the design of crossbar-based hardware and memristor-enabled circuits for energy-efficient and intelligent computing systems. He also focuses on hardware accelerators for AI and signal processing, hardware–algorithm co-design, and scalable low-power VLSI systems for next-generation electronic platforms. In addition, he is actively involved in the development of application-specific integrated circuits (ASICs) for strategic and scientific applications, including space electronics, radiation and X-ray detection systems, and ED-XRF–based instrumentation, contributing toward indigenous semiconductor and instrumentation technologies.
1. Basics of Electronics Engineering
2. Analog Integrated Circuits
3. Microprocessor and Microcontroller
4. Digital Electronics
5. Current Mode Analog Circuit
6. CAD for VLSI
|
Degree |
Subject | University/Institution | Year |
|---|---|---|---|
| B.Tech | Electronics & Communication Engineering | Sant Longowal Institute of Engineering and Technology, Longowal, Punjab, India (MHRD Funded Deemed University) | (July 2000 - June 2003) |
| M.Tech | Electronics Design and Technology | Central University, Tezpur (Assam), India | (July 2005 - June 2007) |
| PhD | Microelectronics and VLSI Design | Indian Institute of Technology (ISM), Dhanbad India | (Oct. 2011 - Nov. 2016) |
| Employer | Post | Period of Employment | ||
| From | To | |||
| Indian Institute of Technology, ISM Dhanbad | Associate Professor | 22.03.2023 | Continuing | |
| Indian Institute of Technology, ISM Dhanbad | Assistant Professor | 30.11.2010 | 21.03.2023 | |
| Sant Longowal Institute of Engineering and Technology, Longowal, Punjab, India (MHRD Funded Deemed University) | Assistant Professor | Aug, 2007 | Nov, 2010 | |
| North Eastern Regional Institute of Technology, Itanagar, Arunachal Pradesh, India (MHRD Funded Deemed University) | Assistant Professor | April, 2007 | July, 2007 | |
| Central Electronics Engineering Research Institute, Pilani, Rajasthan, India. | Project Scientist | July, 2004 | Aug, 2005 | |
Awards and Honors:
Positions of Responsibility:
Editorial and Professional Activities:
Year 2026
[1] V. Upadhyay, N. Singhal, B. S. Makhdoomi, V. Saxena, R. K. Ranjan, and S.-M. Kang, “Design of a 65 nm CMOS Neuromorphic Circuit for Sequential Alphanumeric Pattern Detection with Experimental Verification,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Mar. 2026.
DOI:10.1109/TVLSI.2026.3674147.
[2] S. Bediga, T. K. Sharma, A. Kalakola, V. Upadhyay, R. K. Ranjan, and S.-M. Kang, “Compact Memristor Emulator with SDDP for Integrated Neuromorphic Temporal Learning,” IEEE Transactions on Circuits and Systems for Artificial Intelligence, Mar. 2026.
DOI:10.1109/TCASAI.2026.3676004.
[3] R. Jaiswal, B. S. Makhdoomi, V. Upadhyay, and R. K. Ranjan, “An event-driven bioinspired associative learning circuit using CCTA-controlled memcapacitive emulator with spike generation”, Integration, p. 102717, Mar. 2026.
DOI:10.1016/j.vlsi.2026.102717.
[4] A. Kalakola, B. S. Makhdoomi, R. Ranjan, R. K. Ranjan, and S. Minaei, “A compact memristor emulator for energy efficient neuron application,” AEU- International Journal of Electronics and Communications, vol. 208, p. 156260, Feb. 2026.
DOI:10.1016/j.aeue.2026.156260
[5] V. Upadhyay, K. K. Kumar, R. Kumar Gupta, V. Saxena, and R. K. Ranjan, “A Passive Symmetrical Memristor Emulator Circuit with Applications in Square Wave Generator, Chaotic Oscillator, and Digital Logic Gates,” Circuits, Systems, and Signal Processing, Feb. 2026.
DOI: 10.1007/s00034-025-03479-x.
Year 2025
[6] N. Kumar and R. K. Ranjan, ”Morphological tuning of VO2 nanowires to develop VO2/CuWO4 nanocomposite for improved supercapacitance as a binder-free electrode,” in Inorganic Chem istry Communications, 2025.
DOI:10.1016/j.inoche.2025.115668.
[7] P. Kumar, R. K. Ranjan and S.-M. Kang, ”An Ultra-Low Power 1.2 pJ/Spike Fully CMOS Spiking Neuron and Its Application,” in IEEE Transactions on Nanotechnology, vol. 24, pp. 462-468, 2025.
DOI:10.1109/TNANO.2025.3613362.
[8] Verma, J.S., Kumar, P., Makhdoomi, B.S., Ranjan, R.K. and Kang, S.M., 2025. ”Memristor Emulator-Based Crossbar Array for Object Detection and Recognition”. IEEE Transactions on Circuits and Systems I: Regular Papers.
DOI:10.1109/TCSI.2025.3553058.
[9] Kumar, N., Sankaranarayanan, S., Kandasamy, M., Husain, A. and Ranjan, R.K., 2025. Perfor mance of Tri-metallic Zn-ion battery cathode using hybrid morphology of VO2/CuWO4 nanocom posite. Cryst Eng Comm.
DOI:10.1039/D5CE00529A.
[10] Kumar, P., Makhdoomi, B.S., Verma, J.S., Sonwani, S., Ranjan, R., and Ranjan, R.K., 2025. Experimental validation of a high-frequency memristor emulator based on CCCCTA framework and its application in chaos circuit. AEU- International Journal of Electronics and Com munications, 190, 155624.
DOI:10.1016/j.aeue.2024.155624.
Year 2024
[11] P. Kumar, R. K. Ranjan and S.-M. Kang, ”Memristor-Emulating-Integrate-and-Fire Neuron Based Fully Neuromorphic Framework for Pattern Recognition,” in IEEE Transactions on Cir cuits and Systems II: Express Briefs, vol. 71, no. 12, pp. 5024-5028, Dec. 2024.
DOI :10.1109/TCSII.2024.3439687.
[12] Kumar, P., Bhat, A.M., Sharma, P.K. and Ranjan, R.K., 2024. A novel and compact MOSFET-C only based grounded meminductor emulator and its application. AEU- International Journal of Electronics and Communications, 183, p.155378.
DOI :10.1016/j.aeue.2024.155378.
[13] Kumar, P., Ranjan, R.K. and Kang, S.M., 2024. A Memristor Emulation in 180-nm CMOS Process for Spiking Signal Generation and Chaos Application. IEEE Transactions on Circuits and Systems I: Regular Papers, 71(4), pp.1757-1770.
DOI :10.1109/TCSI.2023.3348695.
[14] N. Raj, S. Dutta, R. K. Ranjan, P. K. Das, D. K. Singh, and Hakan Kuntman, “VDTA based transadmittance mode instrumentation amplifier with experimental results,” International Journal of Electronics, vol. 112, no. 10, pp. 2194–2211, Dec. 2024.
DOI :10.1080/00207217.2024.2439182.
[15] Raj, N. and Ranjan, R.K., 2024. Emulation of novel floating and tunable Multimem-Elements circuit and its application. AEU- International Journal of Electronics and Communications, 177, p.155215.
DOI :10.1016/j.aeue.2024.155215.
[16] Sharma, P.K., Ranjan, R.K. and Kang, S.M., 2024. A Compact Electronically Tunable Memin ductor Emulator Model and Its Application. IEEE Circuits and Systems Magazine, 24(3), pp.8-18.
DOI: 10.1109/MCAS.2024.3353151.
[17] Verma, J.S., Joshi, M., Ranjan, R.K. and Kang, S.M., 2024. A compact memristor emulator for novel IC applications: Its design and experimental validation. Chaos, Solitons & Fractals, 183, p.114824.
DOI : 10.1016/j.chaos.2024.114824.
[18] Srivastava, P., Sharma, R.K., Gupta, R.K., Kacar, F. and Ranjan, R.K., 2024. New DTMOS Based High Frequency Memristor Emulator and Its Nonlinear Applications. IEEE Access, 12, pp.9195-9205.
DOI: 10.1109/ACCESS.2023.3344311.
[19] Tasneem, S., Ranjan, R.K. and Paul, S.K., 2024. Low-Frequency Electronically Tunable Frac tional Filter and its Implementation as Neural Network. Journal of Circuits, Systems and Computers, 33(2).
DOI: 10.1142/S0218126624500373.
Year 2023
[20] Tasneem, S., Ranjan, R.K., Paul, S.K. and Herencsar, N., 2023. Power-Efficient Electronically Tunable Fractional-Order Filter. Fractal and Fractional, 8(1), p.31.
DOI: 10.3390/fractalfract8010031.
[21] Surendra Prasad, S., Dutta, S., Choubey, C.K., Dubey, S.K., Priyadarshini, B. and Ranjan, R.K., 2023. Tunable floating and grounded memristor emulator model. International Journal of Electronics, pp.1–18.
DOI: 10.1080/00207217.2023.2267218.
[22] Sharma, P.K., Tasneem, S. and Ranjan, R.K., 2023. A New Electronic Tunable High-Frequency Meminductor Emulator Based on a Single VDTA. IEEE Canadian Journal of Electrical and Computer Engineering, 46(2), pp.179-184.
DOI: 10.1109/ICJECE.2023.3261886.
[23] Khateb, F., Kumngern, M., Kulej, T. and Ranjan, R.K., 2023. 0.5 V Multiple-Input Multiple Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator. IEEE Access, 11, pp.31212-31227.
DOI:10.1109/ACCESS.2023.3260146.
[24] Sagar, R., Ranjan, R.K. and Kang, S.M., 2023. Resistorless Floating/Grounded Memristor Emulator Model With Electronic Tunability. IEEE Transactions on Circuits and Systems II: Express Briefs, 70(7), pp.2340-2344.
DOI : 10.1109/TCSII.2023.3242301.
[25] Tasneem, S., Sharma, P.K., Ranjan, R.K. and Khateb, F., 2023. Electronically Tunable Memris tor Emulator Implemented Using a Single Active Element and Its Application in Adaptive Learning. Sensors, 23, p.1620.
DOI : 10.3390/s23031620.
[26] Kumar, P., Kaushik, B.K. and Ranjan, R.K., 2023. A novel second generation current conveyor (CCII)-based high frequency memristor model. Microelectronic Engineering, 271, p.111938.
DOI : 10.1016/j.mee.2023.111938.
[27] Kumar, P., Srivastava, P., Ranjan, R.K. and Kumngern, M., 2023. New Zero Power Memristor Emulator Model and Its Application in Memristive Neural Computation. IEEE Access, 11, pp.5609-5616.
DOI : 10.1109/ACCESS.2023.3236424.
[28] Dutta, S., Kumar, P., Ranjan, R.K. et al., 2023. An Improved DDCCTA toward its Application in Different Wave-Function and PWM Generation. Arab Journal of Science and Engineering, 48, pp.14313–14332.
DOI : 10.1007/s13369-022-07559-x.
[29] Sharma, P.K., Prasad, S.S., Tasneem, S., Priyadarshini, B. and Ranjan, R.K., 2023. Resistive tunable memristor emulator model and its application. AEU- International Journal of Elec tronics and Communications, 160, p.154500.
DOI : 10.1016/j.aeue.2022.154500.
Year 2022
[30] Prasad, S.S., Kumar, P., Raj, N., Sharma, P.K., Priyadarshini, B., Ranjan, R.K. and Prommee, P., 2022. A compact floating and grounded memristor model using single active element. AEU International Journal of Electronics and Communications, 157, p.154426.
DOI : 10.1016/j.aeue.2022.154426.
[31] Sagar, N., Raj, V.K., Verma and R.K. Ranjan, 2022. Electronically Tunable Flux-Controlled Resistorless Memristor Emulator. IEEE Canadian Journal of Electrical and Computer Engineering, 45(3), pp.311-317.
DOI : 10.1109/ICJECE.2022.3182711.
[32] Raj, N., Ranjan, R.K. and James, A., 2022. Chua’s Oscillator With OTA Based Memcapacitor Emulator. IEEE Transactions on Nanotechnology, 21, pp.213-218.
DOI : 10.1109/TNANO.2022.3168154.
[33] Srivastava, P., Sharma, R.K. and Ranjan, R.K., 2022. On the Realization of Current-Mode Four-Quadrant CMOS Fractional Power and Cube-Root Converter. Arab Journal of Science and Engineering, 47, pp.13837–13855.
DOI : 10.1007/s13369-021-06488-5.
Year 2021
[34] Tasneem, S., Ranjan, R.K. and Paul, S.K., 2021. Performance Enhancement of Current Follower Transconductance Amplifier (CFTA) and its Application as Filter. Journal of Circuits, Systems, and Computers.
DOI : 10.1142/S0218126622500244.
[35] Raj, N., Sagar, R., Ranjan, R.K. and Priyadarshini, B., 2021. Electronically Tunable Full Wave Precision Rectifier Using DVCCTAs. Electronics, 10, p.1262.
DOI : 10.3390/electronics10111262.
[36] Verma, V.K. and Ranjan, R.K., 2021. Design of Active PWM Control Driver Circuit for Torquer System Using CCII. IEEE Access, 9, pp.75426-75434.
DOI : 10.1109/ACCESS.2021.3081581.
[37] Raj, N., Ranjan, R.K., Khateb, F. and Kumngern, M., 2021. Mem-Elements Emulator Design With Experimental Validation and Its Application. IEEE Access, 9, pp.69860-69875.
DOI : 10.1109/ACCESS.2021.3078189.
[38] Verma, V.K., Ranjan, R.K., Prince, P., Appasani, B., Bizon, N. and Thounthong, P., 2021. A New Active Control Driver Circuit for Satellite’s Torquer System Using Second Generation Current Conveyor. Electronics, 10, p.911.
DOI : 10.3390/electronics10080911.
[39] Prasad, S.S., Kumar, P. and Ranjan, R.K., 2021. Resistorless Memristor Emulator Using CFTA and Its Experimental Verification. IEEE Access, 9, pp.64065-64075.
DOI : 10.1109/ACCESS.2021.3075341.
[40] Kumngern, M., Kulej, T., Khateb, F., Stopjakova, V. and Ranjan, R.K., 2021. Nanopower multiple-input DTMOS OTA and its applications to high-order filters for biomedical systems. AEU- International Journal of Electronics and Communications, 130, p.153576.
DOI : 10.1016/j.aeue.2020.153576.
Year 2020
[41] Jaikla, W., Khateb, F., Kumngern, M., Kulej, T., Ranjan, R.K. and Suwanjan, P., 2020. 0.5 V Fully Differential Universal Filter Based on Multiple Input OTAs. IEEE Access, 8, pp.187832 187839.
DOI : 10.1109/ACCESS.2020.3030239.
[42] Sharma, P.K., Ranjan, R.K., Khateb, F. and Kumngern, M., 2020. Charged Controlled Mem Element Emulator and Its Application in a Chaotic System. IEEE Access, 8, pp.171397-171407.
DOI : 10.1109/ACCESS.2020.3024769.
[43] Srivastava, P., Gupta, R.K., Sharma, R.K. Ranjan, 2020. MOS-Only Memristor Emulator. Circuits, Systems, and Signal Processing, 39, pp.5848–5861.
DOI : 10.1007/s00034-020-01421-x.
[44] Raj, N., Ranjan, R.K. and Khateb, F., 2020. Flux-Controlled Memristor Emulator and Its Experimental Results. IEEE Transactions on VLSI Systems, 28(4), pp.1050-1061.
DOI : 10.1109/TVLSI.2020.2966292.
[45] Verma, V.K., Ranjan, R.K., Lekshmi, V. et al., 2020. A second generation current conveyor based PID controller optimized using a crossover improved genetic algorithm. Microsystem Technologies, 26, pp.1449–1454.
DOI : 10.1007/s00542-019-04677-9.
Year 2019
[46] Khateb, F., Kulej, T., Kumngern, M., Jaikla, W. and Ranjan, R.K., 2019. Comparative per formance study of multiple-input bulk-driven and multiple-input bulk-driven quasi-floating-gate DDCCs. AEU- International Journal of Electronics and Communications, 108, pp.19 28.
DOI : 10.1016/j.aeue.2019.06.003.
[47] Ranjan, R.K., Sagar, S., Roushan, S., Kumari, B., Rani, N. and Khateb, F., 2019. High-frequency floating memristor emulator and its experimental results. IET Circuits, Devices & Systems, 13, pp.292-302.
DOI : 10.1049/iet-cds.2018.5191.
[48] Ranjan, R.K., Sharma, P.K., Sagar, Raj, N., Kumari, B. and Khateb, F., 2019. Memristor emulator circuit using multiple-output OTA and its experimental results. Journal of Circuits, Systems and Computers, 28(10), p.1950166.
DOI : 10.1142/S0218126619501664.
[49] Appasani, B., Prince, P., Ranjan, R.K. et al., 2019. A Simple Multi-band Metamaterial Absorber with Combined Polarization Sensitive and Polarization Insensitive Characteristics for Terahertz Applications. Plasmonics, 14, pp.737–742.
DOI : 10.1007/s11468-018-0852-x.
[50] Shrivastava, P., Surendra, S., Ranjan, R.K. et al., 2019. PI, PD and PID Controllers Using Single DVCCTA. Iranian Journal of Science and Technology, Transactions of Electrical Engineering, 43, pp.673–685.
DOI : 10.1007/s40998-019-00180-z.
[51] Gupta, P., Verma, V.K., Ranjan, R.K. et al., 2019. A series expansion method aided design of current mode second generation current conveyor based active control circuit. Microsystem Technologies, 25, pp.2323–2330.
DOI : 10.1007/s00542-018-4117-6.
[52] Srivastava, P., Sharma, R.K. and Ranjan, R.K., 2019. On the realisation of current-mode four quadrant CMOS cuber. Analog Integrated Circuits and Signal Processing, 99, pp.47–61.
DOI : 10.1007/s10470-018-1291-5.
Year 2018
[53] Verma, V.K., Ranjan, R.K., Gupta, P. et al., 2018. A series expansion method aided design of CCII controller for a TITO system. Microsystem Technologies, 24, pp.3843–3849. DOI : 10.1007/s00542-018-3869-3.
[54] Ranjan, R.K. and Paul, S.K., 2018. Self generating square/triangular wave and pulse width modulator using a single MO-CCCDTA. Analog Integrated Circuits and Signal Processing, 94, pp.177–193.
DOI : 10.1007/s10470-017-1089-x.
[515] Ranjan, R.K., Sinha, A. and Paul, S.K., 2019. A New Operational Transconductance Amplifier Based Pulse Width Modulator. Proceedings of the National Academy of Sciences, India Section A: Physical Sciences, 89, pp.51–55.
DOI : 10.1007/s40010-017-0390-5.
Year 2017
[56] Ranjan, R.K., Raj, N., Bhuwal, N. and Khateb, F., 2017. Single DVCCTA based high frequency incremental/decremental memristor emulator and its application. AEU- International Journal of Electronics and Communications, 82, pp.177-190.
DOI : 10.1016/j.aeue.2017.07.039.
[57] Ranjan, R.K., Mazumdar, K., Pal, R. et al., 2017. Generation of square and triangular wave with independently controllable frequency and amplitude using OTAs only and its application in PWM. Analog Integrated Circuits and Signal Processing, 92, pp.15–27.
DOI : 10.1007/s10470-017-0971-x.
[58] Mazumdar, K., Ranjan, R.K., Shankar, R., Priyadarshini, B. and Ghosal, A., 2017. Modern comparative approach for carrier transport in InAlN/AlN superlattice device with characteristics and modelling using nitride (14N, 15N) isotopes. Superlattices and Microstructures, 103, pp.190-194.
DOI : 10.1016/j.spmi.2017.01.008.
[59] Ranjan, R.K., Rani, N., Pal, R., Paul, S.K. and Kanyal, G., 2017. Single CCTA based high frequency floating and grounded type of incremental/decremental memristor emulator and its application. Microelectronics Journal, 60, pp.119-128.
DOI : 10.1016/j.mejo.2016.12.004.
Year 2016
[60] Ranjan, R.K., Choubey, C.K., Nagar, B.C. and Paul, S.K., 2016. Comb filter for elimination of unwanted power line interference in biomedical signal. Journal of Circuits, Systems and Computers, 25(06), p.1650052.
DOI : 10.1142/S0218126616500523.
[61] Mazumdar, K., Ranjan, R.K., Shankar, R., Sharan, A., Priyadarshini, B., Kundu, M. and Ghosal, A., 2016. Analysis of electron transport in AlGaN/GaN superlattice HEMTs for isotopes 14N and 15N. Superlattices and Microstructures, 100, pp.983-987.
DOI : 10.1016/j.spmi.2016.10.065.
Year 2014
[62] Ranjan, R.K., Yalla, S.P., Sorya, S. and Paul, S.K., 2014. Active comb filter using operational transconductance amplifier. Active and Passive Electronic Components, 2014(1), p.587932.
DOI : 10.1155/2014/587932.
Year 2013
[63] Ghosh, M., Paul, S.K., Ranjan, R.K. and Ranjan, A., 2013. Third order universal filter using single operational transresistance amplifier. Journal of Engineering, 2013(1), p.317296.
DOI : 10.1155/2013/317296
Year 2025
[1] P. Srivastava, P. Kumar and R. K. Ranjan, ”2-MOSFET Dynamic Threshold-Based Reversible Bipolar Unbiased Inverse-Memristor Emulator,” 2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST), Dresden, Germany, 2025, pp. 1-5. DOI: 10.1109/MO CAST65744.2025.11083917.
Year 2024
[2] Makhdoomi, B.S. and Ranjan, R.K., 2024. Memristor Emulator Circuit Design using MOCCII. In 2024 International Conference on Modeling, Simulation & Intelligent Computing (MoSICom), Dubai, United Arab Emirates (pp. 17-22). IEEE. DOI: 10.1109/MoSICom63082.2024.10881881.
[3] N. Raj, P. Deepthi, K. J. Dayanand and R. K. Ranjan, ”Generic Memcapacitor Design with Tunable and Resistorless Features and Experimental Investigations,” 2024 International Conference on Modeling, Simulation & Intelligent Computing (MoSICom), Dubai, United Arab Emirates, 2024, pp. 369-372, DOI: 10.1109/MoSICom63082.2024.10881752.
[4] P. K. Sharma, A. Mohanty, P. Kumar, R. K. Ranjan and R. Kumar, ”Investigation of Aluminum With Group III Compounded Semiconductor Material in JLTFET,” 2024 IEEE International Con ference on Smart Power Control and Renewable Energy (ICSPCRE), Rourkela, India, 2024, pp. 1-4, DOI: 10.1109/ICSPCRE62303.2024.10674867.
Year 2023
[5] Dutta, S., Ranjan, R.K. and Singh, D.K., 2023, April. Designing Tuneable Circuits Using the DDCC2TA for Square, Triangular Wave Generation and Pulse Width Modulation. In 2023 Second International Conference on Electrical, Electronics, Information and Communication Technologies (ICEEICT) (pp. 1-5). IEEE. DOI: 10.1109/ICEEICT56924.2023.10157604.
Year 2022
[6] Sharma, P.K., Kumar, P. and Ranjan, R.K., 2022, October. A high-frequency flux controlled grounded memristor emulator. In 14th International Conference on Information Technology and Electrical Engineering (ICITEE) (pp. 64-67). IEEE. DOI: 10.1109/ICITEE56407.2022.9954099.
[7] Sharma, P.K., Prasad, S.S., Tasneem, S. and Ranjan, R.K., 2022, May. A new Grounded Mem ristor Emulator using DVCC and OTA. In 19th International Conference on Electrical Engineer ing/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON) (pp. 1-4). IEEE. DOI: 10.1109/ECTI-CON54298.2022.9795412.
[8] Prasad, S.S., Raj, N., Sharma, P.K. and Ranjan, R.K., 2022, May. Grounded memristor emulator using single active block. In 19th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON) (pp. 1-4). IEEE. DOI: 10.1109/ECTI-CON54298.2022.9795587.
Year 2021
[9] Prasad, S.S., Tasneem, S., Priyadarshini, B. and Ranjan, R.K., 2021, September. Electronic Tunable Bi-Quad Filter Using MO-CCCDTA. In Fourth International Conference on Electrical, Computer and Communication Technologies (ICECCT) (pp. 1-6). IEEE. DOI: 10.1109/ICECCT52121.2021.9616870.
Year 2018
[10] Raj, N., Chandra, S., Priyadarshani, B. and Ranjan, R.K., 2018, March. Multiple output current controlled current conveyor transconductance amplifier using BiCMOS for analog signal processing. In 4th International Conference on Recent Advances in Information Technology (RAIT). IEEE. DOI: 10.1109/RAIT.2018.8388989.
[11] A. K. V Jha, V. K. Verma, P. Prince, B. Priyadarshini and R. K. Ranjan, ”PSO Based Design of Current CCII-PID Controller for the Speed Control of BLDC Motor,” 2018 International Con ference on Power, Energy, Control and Transmission Systems (ICPECTS), Chennai, India, 2018, pp. 245-248. DOI: 10.1109/ICPECTS.2018.8521567.
[12] Kumari, S., Prince, P., Verma, V.K., Appasani, B. and Ranjan, R.K., 2018, February. GA based design of current conveyor PLD controller for the speed control of BLDC motor. In 4th International Conference on Computational Intelligence & Communication Technology (CICT) (pp. 1-3). IEEE. DOI: 10.1109/CIACT.2018.8480149.
[13] Tewary, S., Verma, V.K., Appasani, B., Gupta, P. and Ranjan, R.K., 2018, February. Design of CCII PID Controller for the Control of Glucose Blood Level Using GA. In 4th International Conference on Computational Intelligence & Communication Technology (CICT) (pp. 1-4). IEEE. DOI: 10.1109/CIACT.2018.8480402.
Year 2017
[14] Verma, V.K., Appasani, B., Gupta, P. and Ranjan, R.K., 2017, September. GA based design of CCII PID controller for an inverted pendulum system. In IEEE International Conference on Power, Control, Signals and Instrumentation Engineering (ICPCSI) (pp. 2721-2723). IEEE. DOI: 10.1109/ICPCSI.2017.8392212.
[15] Gupta, P., Appasani, B., Verma, V.K. and Ranjan, R.K., 2017, September. PSO based CCII PID controller for a continuous stirred tank reactor system. In IEEE International Conference on Power, Control, Signals and Instrumentation Engineering (ICPCSI) (pp. 2786-2789). IEEE. DOI: 10.1109/ICPCSI.2017.8392227.
Year 2016
[16] Rani, N., Ranjan, R. K., Pal, R. and Paul, S.K., 2016, March. Programmable and electronically tunable voltage-mode universal biquadratic filter based on simple CMOS OTA. In 3rd International Conference on Devices, Circuits and Systems (ICDCS) (pp. 58-62). IEEE. DOI: 10.1109/ICDCSyst.2016.7570623.
Year 2014
[17] Ranjan, R.K., Kumar, Y.S.P., Sorya, S., Paul, S.K. and Ghosh, M., 2014, February. Efficient Active Filter for filtering of harmonics in biomedical signal. In International Conference BEATS 2014, UIET, Chandigarh, India. Year 2013
[18] Ghosh, M., Paul, S.K., Ranjan, R.K. and Ranjan, A., 2013. Third order universal filter using single operational transresistance amplifier. Journal of Engineering, 2013(1), p.317296. DOI: 10.1109/CODEC.2012.6509217
|
Title of Project |
Authority |
Funding |
Amount of Grant (In Rs.) |
Starting Date/ Duration |
Status |
|
|
1. |
Ultra-Low Power Neuromorphic Spiking Architecture for Assistive Smart Glasses |
Principal Investigator |
MEITY, New Delhi |
112 L |
1/7/2023 (60 Months) |
Ongoing |
|
2. |
Memristor based Multilayer Neural Networks (MNN) and its application in Neuromorphic System |
Principal Investigator |
CSIR |
38 L |
1/4/2023 (36 Months) |
Ongoing |
|
3. |
Design and Implementation of a Light-to-digital Converter for Photoplethysmogram (PPG) Sensor Application. |
Team Member |
CSIR-CEERI |
17 L |
16/6/2021 (36 Months) |
Ongoing |
|
4. |
Memristor Based Biosensor Design for COVID-19 |
Principal Investigator |
MHRD(SICRG)/2020-2021/740/ECE |
10 L |
9/11/2020 (37 Months) |
Completed |
|
5. |
Auto irrigation and soil monitoring system for COVID-19 migrants Engagement. |
Principal Investigator |
IEEE/2020-2021/718/ECE |
7 L |
23/6/2020 (24 Months) |
Completed |
|
6. |
FIST-2019 Project of Department of Electronics Engineering |
Member of project (VLSI implementation group) |
Department of Science and Technology (DST), Government of India & TPN-31665 |
190 L |
7/1/2020 (60 Months) |
Ongoing |
|
7. |
Determination of 120W street light parameters. |
Principal Investigator |
Dhanbad Municipal Corporation & TEST/5013/2018-2019 |
0.85 L |
2018-2019 |
Completed |
|
8. |
Determination of 90W street light parameters. |
Principal Investigator |
Dhanbad Municipal Corporation & TEST/5014/2018-2019 |
0.59 L |
2018-2019 |
Completed |
|
9. |
Quotation for testing of LED Street Light |
Principal Investigator |
Office of the Dy. Commissioner of Customs, Banskop & CONS/3508/2017-2018 |
0.174 L |
2017-2018 |
Completed |
|
10. |
Design of new low power low voltage and high bandwidth Current Mode Building Block (CMBB) and its application in analog signal processing and signal generating circuits. |
Principal Investigator |
Minor Research Project, TEQIP-II |
2L |
20-01-2017 |
Completed |
|
S. No. |
Title of Course |
Authority |
Department |
Amount of Grant (in INR) |
Month/Year |
Status |
|
1. |
Advanced Analog Signal processing and Generating Circuits. |
Co-Consultant |
Department of Electronics and Communication IIT(ISM) Dhanbad |
0.48 L |
2014 |
Completed |
|
2. |
Current mode Analog Circuits |
Co-Consultant |
Department of Electronics and Communication IIT(ISM) Dhanbad |
0.70 L |
2013 |
Completed |
|
3. |
Advance Analog Circuits using Current Mode Building Blocks |
Co-Consultant |
Department of Electronics and Communication IIT(ISM) Dhanbad |
1 L |
2015 |
Completed |
|
4. |
DST (SERB) KARYASHALA |
Coordinator |
Department of Electronics and Communication IIT(ISM) Dhanbad |
5L |
2022 |
Completed |
|
5. |
AICTE Margdarshan Scheme Training program |
Coordinator |
Department of Electronics and Communication IIT(ISM) Dhanbad |
18 L |
2024 |
Ongoing |
Senior Member of IEEE
Administrative Responsibilities at IIT(ISM) Dhanbad:
Short Term Courses/Workshops/Conferences/Meetings Organized:
Ph.D. Student Supervision (Awarded):
| S.No. | Name & Adm. No. | Year of Registration & Status | Proposed Thesis Title | |||||
| 1 | PUSHKAR SRIVASTAVA (17DP000209) | 2017, Awarded | An Investigation into Selected Class of Non-Linear Analog Signal Processing Circuits | |||||
| 2 | VIJAY KUMAR VERMA (17DP000215) | 2016, Awarded | Realization Of Active Control Circuits Using Current Mode Building Blocks | |||||
| 3 | SOMENATH DUTTA (17DP000255) | 2016, Awarded | Design of Analog Signal Processing Circuits Using Analog Building Blocks | |||||
| 4 | NIRANJAN RAJ (17DR000367) | 2017, Awarded | Study And Implementation of Novel Mem-Elements Emulator Circuit and Applications | |||||
| 5 | SAGAR (17DR000477) | 2017, Awarded | Design And Performance Analysis of Memristor Emulator Circuit and Its Applications. | |||||
| 6 | PANKAJ KUMAR SHARMA (17DR000641) | 2017, Awarded | Study And Design of Mem-Element Emulators and Their Applications | |||||
| 7 | SADAF TASNEEM (18DR0119) | 2018, Awarded | Design And Performance Analysis of Fractional-Order Filters Using Current Mode Building Blocks | |||||
| 8 | PRASHANT KUMAR (19DR0108) | 2019, Awarded | Design Of Memristor Emulator Circuits and Its Applications | |||||
| 9 | JAGVEER SINGH VERMA (18DP0002) | 2018, Awarded | Design and Realization of CMOS-Based Memristor Emulator Circuits and their Applications |
Ph.D. Student Supervision (Ongoing):
| S.No. | Name & Adm. No. | Year of Registration & Status | Proposed Thesis Title | |||||
| 1 | RAHUL RANJAN (23DR0123) | 2023, Ongoing | Low Power Memristor Design and Its Application In Neuromorphic Computing | |||||
| 2 | RAVI JAISWAL (23DP0030) | 2023, Ongoing | Mixed-Signal Neuromorphic Architectures Leveraging Memristive Devices for Energy- Efficient Cognitive Processing | |||||
| 3 | SHWETA KUMARI (23DR0317) | 2023, Ongoing | Mixed-Signal Neuromorphic Circuits with Memristive Synapses for Real-Time Pattern Recognition | |||||
| 4 | BASIT SHAFAT MAKHDOOMI (23DR0212) | 2023, Ongoing | Design of memelement based ultra low power neuromorphic spiking architecture and it’s ap- plication | |||||
| 5 | NIRAJ KUMAR (24DP0098) | 2024, Ongoing | Design and Development of Energy Storage Device | |||||
| 6 | SOURAV MAJI (24DR0186) | 2024, Ongoing | Memristive Mixed-Signal Neuromorphic Circuits: Models, Design Techniques, and Applications | |||||
| 7 | NITIN SINGHAL (24DR0239) | 2024, Ongoing | Design and Development of SNN Architecure for Smart Glass | |||||
| 8 | VEDANT UPADHYAY (25DR0039) | 2025, Ongoing | Hybrid CMOS-Based MixedSignal Neuromorphic Architecture and AI in Hardware for Edge Intelligence | |||||
| 9 | ANURAG TYAGI (25DP0063) | 2025, Ongoing | Memristor-Based low power Mixed-Signal Neuromorphic Circuits for On-Board (Space Based flight) Processing | |||||
| 10 |
KALAKOLA ARUN (25DR0286) |
2025, Ongoing | Memristor-based Multilayer Neural Networks (MNN) and its Application in Neuromorphic System | |||||
| 11 |
AMARKANT (26DR0005) |
2026, Ongoing | Ultra-Low Power Neuromorphic Spiking Architecture for Assistive Smart Glass | |||||
| 11 |
Satyam Pandey (26DR0045) |
2026, Ongoing | Not Decided | |||||